
1. Hardware Fundamentals & Specifications
| Hardware Module | Specification | Commercial & Engineering Value |
| MCU | ESP32-S3FH4R2 (Wi-Fi 4 + BLE 5) | Supports high-speed local short-range networking and near-field wireless configuration |
| LoRa RF | E22-900MM22S (Semtech SX1262 based) | 22 dBm maximum transmit power, up to 7 km theoretical transmission range |
| Onboard Peripherals | 0.96″ OLED, MicroSD Slot, USB Type-C | Ready to use out of the box; debug data without assembling extra circuits |
| Power Management | Dual LDOs, JST Battery Connector, LiPo Charging Circuit | Supports direct single-cell LiPo battery supply and solar charging input |
| Dimensions | 27 x 64 mm | Suitable for compact press-fit assembly in edge-sensing devices |
2. Power Profile Measurements & Technical Breakdown
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Base Deep Sleep (Floor Noise): 21.74 µAStatic sleep current measured with the OLED peripheral and USB-to-serial chip powered down, and DC-DC regulator mode enabled.
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Standard WOR Listening Mode: 51.30 µAWeighted average current when utilizing the SX1262's default
autoDutyCyclepolling/listening mode.
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CAD Interrupt Optimized Mode: 38.19 µAWeighted average current after introducing Channel Activity Detection (CAD) interrupts as a pre-check mechanism for WOR.
Theoretical Battery Life: The node spends 99.9% of its time in deep sleep. At an average current of 38.19 µA, a standard 3000 mAh LiPo battery can theoretically power the device for up to ~107.7 months (~8.9 years) of continuous operation.
3. Onboarding Friction & Factory Hardware Limitations
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DIO1 Pin Mapping Conflict: In factory condition, the SX1262 interrupt pin (
DIO1) is hard-wired to the main controller'sGPIO33. In the ESP32-S3 architecture,GPIO33lacks RTC external wake capability (it cannot trigger EXT0/EXT1 deep-sleep wakeups).
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Required Hardware Modification: To achieve ~38.19 µA WOR sleep-wake functionality, developers must manually reroute/jumper
DIO1to a true RTC-capable wake pin (such asGPIO16).
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Missing Silkscreen: The board lacks printed GPIO pin numbers, requiring developers to carefully consult official schematics when making wiring modifications.

4. Competitive Landscape & Comparison
| Model | Chipset Combo | Power (Deep Sleep) | Onboarding Difficulty | Core Pros & Cons |
| EoRa-S3-900TB | ESP32-S3 + SX1262 | ~38 µA (Modified) | Medium-High (Mod required) | Lowest cost and power floor; requires rerouting DIO1 for RTC wake |
| Heltec WiFi LoRa 32 V3 | ESP32-S3 + SX1262 | ~80 µA - 100 µA | Low (Out of the box) | Great ecosystem and ready-to-run examples; slightly higher sleep current |
| LilyGO TTGO T-Beam | ESP32 + SX1262 + GPS | ~1.5 mA (w/ AXP) | Medium (Complex config) | Integrated GPS/PMU suitable for tracking; higher idle power consumption |
| Seeed Studio Wio-E5 | STM32WLE5JC (Single-chip) | ~2.1 µA (LoRa only) | Low (AT Commands) | Industrial-grade stability with ultra-low power; lacks Wi-Fi/BLE dual-mode |
5. Selection Decision Tree & Alternatives
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Cost-Sensitive Deployment: Projects requiring sub-$20 unit pricing with dual Wi-Fi/LoRa connectivity for field testing.
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Engineering Teams with Hardware Capabilities: Teams comfortable with modifying PCB pin routing to achieve microamp-level, 8+ year maintenance-free battery lifespans.
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Active Scheduled Reporting Nodes: Nodes that periodically wake up to transmit data on a fixed schedule (without needing WOR passive wakeup), where factory sleep currents naturally drop as low as ~21.74 µA.
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Beginner Software Developers: Consider the Heltec WiFi LoRa 32 V3 for sensible default pinouts without needing soldering hardware workarounds.
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Dedicated Ultra-Low Power Nodes (No Wi-Fi Required): Consider the Seeed Studio Wio-E5 module to avoid handling complex ESP32 RTC wake logic altogether.
6. Frequently Asked Questions (FAQ)
Q1: Are the ~38.19 µA power measurements authentic and independently verifiable?
A: Yes. The test data comes directly from a community project published on Hackster.io. The developer used a Nordic Power Profiler Kit 2 (PPK2) in Ampere Mode at a 100 ksps sampling rate directly on the DUT battery rail. All raw captures, serial logs, and methodology notes are publicly accessible for community verification.
Q2: Is the ~38.19 µA figure achieved out of the box, or does it require modifications?
A: Achieving the ~38.19 µA average current during active Wake-On-Radio (WOR) monitoring requires a hardware reroute. Out of the box, the board's SX1262 DIO1 pin is routed to GPIO33, which cannot wake the ESP32-S3 from deep sleep. You must reroute DIO1 to an RTC-capable wake pin like GPIO16. Without this modification, the board still achieves ~21.74 µA in static deep sleep, but cannot wake up passively via RF signals.
Q3: How does the CAD interrupt method differ from the earlier autoDutyCycle method?
A: In earlier revisions of the project, the node used autoDutyCycle WOR detection, resulting in an average current of 51.30 µA (~6.7 years of life on a 3000 mAh battery). Switching to Channel Activity Detection (CAD) interrupts as a pre-check before opening the receive window reduced the average current by 25.6% down to 38.19 µA, extending theoretical battery life to 8.9 years.
Q4: Does Ebyte acknowledge or support the GPIO16 rerouting workaround?
A: Yes. The official EoRa-S3-900TB product page features pro-tips and documentation noting that developers requiring hardware DIO1 interrupts to wake the ESP32-S3 from deep sleep can reroute DIO1 to RTC_NUM_16 (GPIO16).
